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may 2012 ? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 FSL126MRT ? green-mode fairchild power switch (fps?) FSL126MRT green-mode fairchild power switch (fps?) features ? internal avalanched rugged 650v sensefet ? advanced soft burst-mode operation for low standby power and low audible noise ? random frequency fluctuation for low emi ? pulse-by-pulse current limit ? various protection functions: overload protection (olp), over-voltage protection (ovp), abnormal over-current protection (aocp), internal thermal shutdown (tsd) with hysteresis and under-voltage lockout (uvlo) with hysteresis ? low operating current(0.4ma) in burst mode ? internal startup circuit ? built-in soft-start: 15ms ? auto-restart mode applications ? power supply for stb home appliances, and dvd combination description the FSL126MRT is an in tegrated pulse width modulation (pwm) controller and sensefet specifically designed for offline switch-mode power supplies (smps) with minimal external components. the pwm controller includes an in tegrated fixed-frequency oscillator, under-voltage lockout (uvlo), leading- edge blanking (leb), optimized gate driver, internal soft-start, temperature-co mpensated precise current sources for loop compensation, and self-protection circuitry. compared with a discrete mosfet and pwm controller solution, the FSL126MRT can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. this device provides a basic platform suited for cost-effective desi gn of a flyback converter. ordering information part number package operating junction temperature current limit r ds(on) (max.) output power table (2) replaces device 230v ac 15% (3) 85~265v ac adapter (4) open frame (5) adapter (4) open frame (5) FSL126MRT to-220f 6-lead (1) w-forming - 40c ~ +125c 1.2a 6.2 30w 40w 17w 25w ka5m0265rydtu notes: 1. pb-free package per jedec j-std-020b. 2. the junction temperature can limit the maximum output power. 3. 230v ac or 100/115v ac with voltage doubler. 4. typical continuous power in a non-v entilated enclosed adapt er measured at 50 c ambient temperature. 5. maximum practical continuous power in an open-frame design at 50 c ambient temperature.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 2 FSL126MRT ? green-mode fairchild power switch (fps?) application circuit ac in v str drain gnd fb v cc v o figure 1. typical application circuit internal block diagram osc 90a i fb r 3r v cc good v str drain fb gnd gate driver v cc leb (350ns) pwm 2 6 3 1 4 2.0a i delay sq r q sq r q v burst 0.40v / 0.55v v aocp v ovp 24.5v v cc tsd v sd 7.0v soft-start 7.5v / 12v v cc good v ref v cc v ref nc 5 random i ch soft burst figure 2. internal block diagram
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 3 FSL126MRT ? green-mode fairchild power switch (fps?) pin configuration figure 3. pin configuration (top view) pin definitions pin # name description 1 drain sensefet drain . high-voltage power sensefet drain connection. 2 gnd ground . this pin is the control ground and the sensefet source. 3 v cc power supply . this pin is the positive supply input, which provides the internal operating current for both startup and steady-state operation. 4 fb feedback . this pin is internally connected to the inverting input of the pwm comparator. the collector of an opto-coupler is typically tied to this pin. for stabl e operation, a capacitor should be placed between this pin and gnd. if the voltage of this pin reaches 7v, the overload protection triggers, whic h shuts down the fps. 5 nc no connection 6 v str startup . this pin is connected directly, or thr ough a resistor, to the high-voltage dc link. at startup, the internal high- voltage current source supplies internal bias and charges the external capacitor connected to the v cc pin. once v cc reaches 12v, the internal current source (i ch ) is disabled.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 4 FSL126MRT ? green-mode fairchild power switch (fps?) absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the devic e may not function or be operable above the recommended operating c onditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stre sses above the recommended operating conditi ons may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v str v str pin voltage 650 v v ds drain pin voltage 650 v v cc v cc pin voltage 26 v v fb feedback pin voltage -0.3 10.0 v i dm drain current pulsed (6) 8 a i ds continuous switching drain current 2 a e as single pulsed avalanche energy (7) 73 mj p d total power dissipation (t c =25c) (8) 50 w t j maximum junction temperature 150 c operating junction temperature (9) -40 +125 c t stg storage temperature -55 +150 c notes: 6. repetitive peak switching current when the inductive load is assumed: limited by maximum duty (d max =0.74) and junction temperature (see figure 4) . 7. l=45mh, starting t j =25 c. 8. infinite cooling condition (refer to the semi g30-88) . 9. although this parameter guarantees ic operation, it does not guarantee all electr ical characteristics. figure 4. repetitive peak switching current esd capability symbol parameter value unit esd human body model, jesd22-a114 5 kv charged device model, jesd22-c101 2 thermal impedance t a =25c unless otherwise specified. symbol parameter value unit ja junction-to-ambient thermal impedance (10) 63.5 c/w jc junction-to-case thermal impedance (11) 2.9 c/w notes: 10. free standing without heat sink under natural convection condi tion, per jedec 51-2 and 1-10. 11. infinite cooling condition per mil std. 883c method 1012.1.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 5 FSL126MRT ? green-mode fairchild power switch (fps?) electrical characteristics t j = 25 c unless otherwise specified. symbol parameter condition min. typ. max. unit sensefet section bv dss drain-source breakdown voltage v cc =0v, i d =250 a 650 v i dss zero-gate-voltage drain current v ds =520v, t a =125 c 250 a r ds(on) drain-source on-state resistance v gs =10v, i d =1a 4.9 6.2 ? c iss input capacitance (12) v ds =25v, v gs =0v, f=1mhz 210 pf c oss output capacitance (12) v ds =25v, v gs =0v, f=1mhz 33.3 pf c rss reverse transfer capacitance (12) v ds =25v, v gs =0v, f=1mhz 4.1 pf t r rise time v ds =325v, i d =2a, r g =25 ? 16.4 ns t f fall time v ds =325v, i d =2a, r g =25 ? 23 ns t d(on) turn-on delay v ds =325v, i d =2a, r g =25 ? 23 ns t d(off) turn-off delay v ds =325v, i d =2a, r g =25 ? 17.2 ns control section f s switching frequency (12) v cc =14v, v fb =4v 61 67 73 khz f s switching frequency variation (12) - 25 c < t j < 125 c 5 10 % d max maximum duty ratio v cc =14v, v fb =4v 61 67 73 % d min minimum duty ratio v cc =14v, v fb =0v 0 % i fb feedback source current v fb =0 65 90 115 a v start uvlo threshold voltage v fb =0v, v cc sweep 11 12 13 v v stop after turn-on, v fb =0v 7.0 7.5 8.0 v t s/s internal soft-start time v cc sweep 15 ms burst-mode section v burh burst-mode voltage v cc =14v, v fb sweep 0.46 0.55 0.66 v v burl 0.33 0.40 0.48 v hys 150 mv protection section i lim peak drain current limit di/dt=300ma/ s 1.05 1.20 1.34 a v sd shutdown feedback voltage v cc =14v, v fb sweep 6.45 7.00 7.55 v i delay shutdown delay current v cc =14v, v fb =4v 1.2 2.0 2.8 a t leb leading-edge blanking time (12,14) 350 ns v ovp over-voltage protection v cc sweep 23.0 24.5 26.0 v t sd thermal shutdown temperature (12) shutdown temperature 130 140 150 c hys hysteresis 60 c continued on the following page?
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 6 FSL126MRT ? green-mode fairchild power switch (fps?) electrical characteristics (continued) t j = 25 c unless otherwise specified. symbol parameter condition min. typ. max. unit total device section i op operating supply current, (control part in burst mode) v cc =14v, v fb =0v 0.3 0.4 0.5 ma i ops operating switching current, (control part and sensefet part) v cc =14v, v fb =2v 1.00 1.35 ma i start start current v cc =11v (before v cc reaches v start ) 85 120 155 a i ch startup charging current v cc =v fb =0v, v str =40v 0.7 1.0 1.3 ma v str minimum v str supply voltage v cc =v fb =0v, v str sweep 26 v notes: 12. although these param eters are guaranteed, t hey are not 100% tested in production. 13. average value. 14. t leb includes gate turn-on time. comparison of ka5m0265r and FSL126MRT function ka5m0265rydtu FSL126MRT advantages of FSL126MRT random frequency fluctuation n/a built - in low emi operating current 7ma 0.4ma very low stand-by power high-voltage startup circuit n/a built - in protections olp ovp tsd olp ovp aocp tsd with hysteresis enhanced protections and high reliability power balance long t cld very short t cld the difference of input power between the low and high input voltage is quite small.
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 7 FSL126MRT ? green-mode fairchild power switch (fps?) typical performance characteristics characteristic graphs are normalized at t a =25c. 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 1 2 normalized temperature [ c] 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 125' c normalized temperature [ c] figure 5. operating supply current (i op ) vs. t a figure 6. operating switching current (i ops ) vs. t a 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 1 2 normalized temperature [ c] 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 1 2 normalized temperature [ c] figure 7. startup charging current (i ch ) vs. t a figure 8. peak drain current limit (i lim ) vs. t a 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 125'c normalized temperature [ c] 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 1 2 normalized temperature [ c] figure 9. feedback source current (i fb ) vs. t a figure 10. shutdown delay current (i delay ) vs. t a
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 8 FSL126MRT ? green-mode fairchild power switch (fps?) typical performance characteristics characteristic graphs are normalized at t a =25c. 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 12 5 normalized temperature [ c] 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 12 5 normalized temperature [ c] figure 11. uvlo threshold voltage (v start ) vs. t a figure 12. uvlo threshold voltage (v stop ) vs. t a 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 1 2 normalized temperature [ c] 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 12 5 normalized temperature [ c] figure 13. shutdown feedback voltage (v sd ) vs. t a figure 14. over-voltage protection (v ovp ) vs. t a 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 12 5 normalized temperature [ c] 0.60 0.70 0.80 0.90 1.00 1.10 1.20 1.30 1.40 -40'c -20'c 0'c 25'c 50'c 75'c 90'c 110'c 120'c 12 5 normalized temperature [ c] figure 15. switching frequency (f s ) vs. t a figure 16. maximum duty ratio (d max ) vs. t a
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 9 FSL126MRT ? green-mode fairchild power switch (fps?) functional description 1. startup: at startup, an inter nal high-voltage current source supplies the inter nal bias and charges the external capacitor (c vcc ) connected to the v cc pin, as illustrated in figure 17. when v cc reaches 12v, the FSL126MRT begins switching and the internal high- voltage current source is disabled. normal switching operation continues and the pow er is supplied from the auxiliary transformer winding unless v cc goes below the stop voltage of 7.5v. figure 17. startup block 2. soft-start : the internal soft-start circuit increases pwm comparator inverting i nput voltage, together with the sensefet current, slowly after startup. the typical soft-start time is 15ms. the pulse width to the power switching device is progressi vely increased to establish the correct working conditions for the transformers, inductors, and capacitors. the voltage on the output capacitors is progressive ly increased to smoothly establish the requir ed output voltage. th is helps prevent transformer saturation and reduces stress on the secondary diode during startup. 3. feedback control : this device employs current- mode control, as shown in figure 18. an opto-coupler (such as the fod817) and shunt regulator (such as the ka431) are typically used to implement the feedback network. comparing the feedback voltage with the voltage across the r sense resistor makes it possible to control the switching duty cy cle. when the reference pin voltage of the shunt regulat or exceeds the internal reference voltage of 2.5v, t he opto-coupler led current increases, pulling down the feedback voltage and reducing drain current. this typically occurs when the input voltage is increased or the output load is decreased. 3.1 pulse-by-pulse current limit : because current- mode control is employed, the peak current through the sensefet is limited by the inverting input of pwm comparator (v fb *), as shown in figure 18. assuming that the 90 a current source flows only through the internal resistor (3r + r =27k ? ), the cathode voltage of diode d2 is about 2.4v. since d1 is blocked when the feedback voltage (v fb ) exceeds 2.4v, the maximum voltage of the cat hode of d2 is clamped at this voltage. therefore, t he peak value of the current through the sensefet is limited. 3.2 leading-edge blanking (leb) : at the instant the internal sensefet is tur ned on, a high-current spike usually occurs through the sensefet, caused by primary-side capacitance and secondary-side rectifier reverse recovery. exce ssive voltage across the r sense resistor leads to incorrect feedback operation in the current-mode pwm cont rol. to counter this effect, the leading-edge blanking (leb) circuit inhibits the pwm comparator for t leb (350ns) after the sensefet is turned on. figure 18. pulse width modulation circuit
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 10 FSL126MRT ? green-mode fairchild power switch (fps?) 4. protection circuits : the FSL126MRT has several self-protective functions, su ch as overload protection (olp), abnormal over-current protection (aocp), over-voltage protection (o vp), and thermal shutdown (tsd). all the protections are implemented as auto- restart. once the fault conditi on is detected, switching is terminated and the sensefet remains off. this causes v cc to fall. when v b cc b falls to the under-voltage lockout (uvlo) stop voltage of 7.5v, the protection is reset and the startup circuit charges the v cc capacitor. when v cc reaches the start voltage of 12.0v, the FSL126MRT resumes normal operation. if the fault condition is not removed, the sensefet remains off and v cc drops to stop voltage again. in this manner, the auto-restart can alternately enable and disabl e the switching of the power sensefet until the faul t condition is eliminated. because these protection circ uits are fully integrated into the ic without exter nal components, reliability is improved without increasing cost. fault situation 7.5v 12.0v v cc v ds t fault occurs fault removed normal operation normal operation power on figure 19. auto-restart protection waveforms 4.1 overload protection (olp) : overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. in this situation, the protection circuit should tri gger to protect the smps. however, even when the smps is in normal operation, the overload pr otection circuit can be triggered during the load trans ition. to avoid this undesired operation, t he overload protection circuit is designed to trigger only after a specified time to determine whether it is a tr ansient situation or a true overload situation. becaus e of the pulse-by-pulse current-limit capability, the maximum peak current through the sensefet is lim ited and, ther efore, the maximum input power is restricted with a given input voltage. if the output cons umes more than this maximum power, the output voltage (v out ) decreases below the set voltage. th is reduces the current through the opto-coupler led, which also reduces the opto-coupler transistor current, increasing the feedback voltage (v fb ). if v fb exceeds 2.4v, d1 is blocked and the 2.0a current source starts to charge c fb slowly up . in this condition, v fb continues increasing until it reaches 7.0v, when the switching operation is terminated, as shown in figure 20. the delay for shutdown is the time required to charge c fb from 2.4v to 7.0v with 2.0a. this protection is implemented in auto-restart mode. figure 20. overload protection 4.2 abnormal over-current protection (aocp) : when the secondary rect ifier diodes or the transformer pins are short ed, a steep current with extremely high di/dt can flow through the sensefet during the minimum turn-on time. even though the FSL126MRT has overload prot ection, it is not enough to protect in that abnormal case; due to the severe current stress imposed on t he sensefet until olp is triggered. the internal aocp circuit is shown in figure 21. when the gate turn-on signal is applied to the power sensefet, the aocp block is enabled and monitors the current through the sensing resistor. the voltage across the resistor is compared with a preset aocp level. if the sensing resistor voltage is greater than the aocp level, the se t signal is applied to the s - r latch, resulting in t he shutdown of the smps. figure 21. abnormal over-current protection
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 11 FSL126MRT ? green-mode fairchild power switch (fps?) 4.4 over-voltage protection (ovp): if the secondary-side feedback circuit malfunctions or a solder defect causes an opening in the feedback path, the current through the opto-coupler transistor becomes almost zero. then v fb climbs up in a similar manner to the overload situat ion, forcing the preset maximum current to be supplied to the smps until the overload protection is tri ggered. because more energy than required is provided to the output, the output voltage may exceed the ra ted voltage before the overload protection is tri ggered, resulting in the breakdown of the devices in the secondary side. to prevent this situation, an o vp circuit is employed. in general, the v cc is proportional to the output voltage and the fs136mrt uses v cc instead of directly monitoring the output voltage. if v cc exceeds 24.5v, an ovp circuit is triggered, resulting in the termination of the switching operat ion. to avoid undesired activation of ovp during normal operation, v cc should be designed to be below 24.5v. 4.5 thermal shutdown (tsd) : the sensefet and the control ic on a die in one package makes it easier for the control ic to detect the over temper ature of the sensefet. if the temperature exceeds 140 c, the thermal shutdown is tri ggered and stops operation. the FSL126MRT operates in auto-restart mode until the temperature dec reases to around 80 c, when normal operation resumes. 5. soft burst-mode operation : to minimize power dissipation in standby m ode, the FSL126MRT enters burst-mode operation. as the load decreases, the feedback voltage decreases. t he device automatically enters burst mode when t he feedback voltage drops below v burl (400mv), as shown in figure 22. at this point, switching stops and t he output voltages start to drop at a rate dependent on st andby current load. this causes the feedback voltage to rise. once it passes v burh (550mv), switching resumes. the feedback voltage then falls and the pr ocess repeats. burst mode alternately enables and dis ables switching of the sensefet, reducing switching loss in standby mode. figure 22. burst-mode operation 6. random frequency fluctuation (rff) : fluctuating switching frequency of an smps can reduce emi by spreading the energy over a wide frequency range. the amount of emi reduction is directly related to the switching frequency variation, which is limited internally. the switching frequency is determined randomly by external feedback voltage and an internal free-running oscillator at every switching instant. this random frequency fluctuation scatters the emi noise around typical switching frequency (67khz) effectively and can reduce the cost of the input filter in cluded to meet the emi requirements (e.g. en55022). figure 23. random frequency fluctuation
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 12 FSL126MRT ? green-mode fairchild power switch (fps?) physical dimensions notes: unless otherwise specified a) this package does not comply to any current packaging standard. b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash, and tie bar extrusions. d) leadform option a e) dfawing filename: to220a06rev4 1.40 1.20 0.80 0.70 0.70 0.50 1,3,5 2,4,6 6 1 8.13 7.13 16.07 15.67 3.48 2.88 3.06 2.46 24.00 23.00 20.00 19.00 6.90 6.50 2.74 2.34 3.40 3.20 10.16 9.96 (5.40) (1.13) 0.60 0.45 (0.48) (0.70) 5 5 (7.15) (13.05) 2.19 1.27 3.81 1.75 (7.00) ? 3.28 3.08 r0.55 r0.55 figure 24. to - 220f - 6l (w - forming) package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2012 fairchild semiconductor corporation www.fairchildsemi.com FSL126MRT ? rev. 1.0.0 13 FSL126MRT ? green-mode fairchild power switch (fps?)

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